<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.10"/>
<title>devcfg: Devcfg_v3_3</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
  <td id="projectalign" style="padding-left: 0.5em;">
   <div id="projectname">devcfg
   </div>
   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.10 -->
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Overview</span></a></li>
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="globals.html"><span>APIs</span></a></li>
      <li><a href="files.html"><span>File&#160;List</span></a></li>
    </ul>
  </div>
</div><!-- top -->
<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
<a href="#define-members">Macros</a> &#124;
<a href="#typedef-members">Typedefs</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">Devcfg_v3_3</div>  </div>
</div><!--header-->
<div class="contents">
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dcfg___config.html">XDcfg_Config</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dcfg.html">XDcfg</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga2ed83e25f13a262faf75dfd55bae3522"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga2ed83e25f13a262faf75dfd55bae3522">XDcfg_Unlock</a>(InstancePtr)</td></tr>
<tr class="separator:ga2ed83e25f13a262faf75dfd55bae3522"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24929684d9a57ee5943c5379ba21114b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga24929684d9a57ee5943c5379ba21114b">XDcfg_GetPsVersion</a>(InstancePtr)</td></tr>
<tr class="separator:ga24929684d9a57ee5943c5379ba21114b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga49f0c43c6fdeb7eff99095fffc5c18e9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga49f0c43c6fdeb7eff99095fffc5c18e9">XDcfg_ReadMultiBootConfig</a>(InstancePtr)</td></tr>
<tr class="separator:ga49f0c43c6fdeb7eff99095fffc5c18e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga16c0f3e337e8ebeb09d71c8b717a9018"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga16c0f3e337e8ebeb09d71c8b717a9018">XDcfg_SelectIcapInterface</a>(InstancePtr)</td></tr>
<tr class="separator:ga16c0f3e337e8ebeb09d71c8b717a9018"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga36775aac99e72ec7459fba541e90c5be"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga36775aac99e72ec7459fba541e90c5be">XDcfg_SelectPcapInterface</a>(InstancePtr)  </td></tr>
<tr class="separator:ga36775aac99e72ec7459fba541e90c5be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga77561dc2e9ea13137f50a8193b8fbcd3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>(BaseAddr,  RegOffset)&#160;&#160;&#160;Xil_In32((BaseAddr) + (RegOffset))</td></tr>
<tr class="separator:ga77561dc2e9ea13137f50a8193b8fbcd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ae617fbb2b3e148a8b2489e90fbdea3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>(BaseAddr,  RegOffset,  Data)&#160;&#160;&#160;Xil_Out32((BaseAddr) + (RegOffset), (Data))</td></tr>
<tr class="separator:ga8ae617fbb2b3e148a8b2489e90fbdea3"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:gacaa24b2920f1bc5b56662062f2c380e0"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gacaa24b2920f1bc5b56662062f2c380e0">XDcfg_IntrHandler</a>) (void *CallBackRef, u32 Status)</td></tr>
<tr class="separator:gacaa24b2920f1bc5b56662062f2c380e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gafcaaa8ac67cf7316c54d1cba36e83e08"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gafcaaa8ac67cf7316c54d1cba36e83e08">XDcfg_CfgInitialize</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, <a class="el" href="struct_x_dcfg___config.html">XDcfg_Config</a> *ConfigPtr, u32 EffectiveAddress)</td></tr>
<tr class="separator:gafcaaa8ac67cf7316c54d1cba36e83e08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabb2094cb7d36f83c4c150a3b18e8aad0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gabb2094cb7d36f83c4c150a3b18e8aad0">XDcfg_EnablePCAP</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:gabb2094cb7d36f83c4c150a3b18e8aad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7f73a84f734f2e1996a029d8e5934b9c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga7f73a84f734f2e1996a029d8e5934b9c">XDcfg_DisablePCAP</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:ga7f73a84f734f2e1996a029d8e5934b9c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacc8c10b5cc877595c1ade09e1a589296"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gacc8c10b5cc877595c1ade09e1a589296">XDcfg_SetControlRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="separator:gacc8c10b5cc877595c1ade09e1a589296"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb69ef133b53618e896a4776b9e8f337"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gaeb69ef133b53618e896a4776b9e8f337">XDcfg_ClearControlRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="separator:gaeb69ef133b53618e896a4776b9e8f337"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga81a254369eea778c17c212cc95056c26"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga81a254369eea778c17c212cc95056c26">XDcfg_GetControlRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:ga81a254369eea778c17c212cc95056c26"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e0516cd9cdc5066e98e3c3c195c1d3c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga1e0516cd9cdc5066e98e3c3c195c1d3c">XDcfg_SetLockRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Data)</td></tr>
<tr class="separator:ga1e0516cd9cdc5066e98e3c3c195c1d3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad3df072e27abfff9beb69cb09567a8c1"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gad3df072e27abfff9beb69cb09567a8c1">XDcfg_GetLockRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:gad3df072e27abfff9beb69cb09567a8c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga89e1eef15fcfe06cd0e8d8dd7e804ad1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga89e1eef15fcfe06cd0e8d8dd7e804ad1">XDcfg_SetConfigRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Data)</td></tr>
<tr class="separator:ga89e1eef15fcfe06cd0e8d8dd7e804ad1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b46b8db6ea49d8c066fefe0d137b2c9"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga3b46b8db6ea49d8c066fefe0d137b2c9">XDcfg_GetConfigRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:ga3b46b8db6ea49d8c066fefe0d137b2c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7a3e8052f73c370990b77dae5751a36"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gae7a3e8052f73c370990b77dae5751a36">XDcfg_SetStatusRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Data)</td></tr>
<tr class="separator:gae7a3e8052f73c370990b77dae5751a36"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaacacd5169ad7a79f09d08858f58dc8e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gaaacacd5169ad7a79f09d08858f58dc8e">XDcfg_GetStatusRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:gaaacacd5169ad7a79f09d08858f58dc8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga332a5c7c856e8f6637cafaa3ec69eaca"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga332a5c7c856e8f6637cafaa3ec69eaca">XDcfg_SetRomShadowRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Data)</td></tr>
<tr class="separator:ga332a5c7c856e8f6637cafaa3ec69eaca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5573651d2f14ff760e36d551a49fa919"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga5573651d2f14ff760e36d551a49fa919">XDcfg_GetSoftwareIdRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:ga5573651d2f14ff760e36d551a49fa919"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2739b6bce23b6e02a9076c0eba8664d4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga2739b6bce23b6e02a9076c0eba8664d4">XDcfg_SetMiscControlRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="separator:ga2739b6bce23b6e02a9076c0eba8664d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaee0dfc6838f33d700fc4b8a5549b0473"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gaee0dfc6838f33d700fc4b8a5549b0473">XDcfg_GetMiscControlRegister</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:gaee0dfc6838f33d700fc4b8a5549b0473"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3412c2881ffaa15fd3615770a4225a7"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gab3412c2881ffaa15fd3615770a4225a7">XDcfg_IsDmaBusy</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:gab3412c2881ffaa15fd3615770a4225a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafda6d24be18657370c15e1e893a0ab05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gafda6d24be18657370c15e1e893a0ab05">XDcfg_InitiateDma</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 SourcePtr, u32 DestPtr, u32 SrcWordLength, u32 DestWordLength)</td></tr>
<tr class="separator:gafda6d24be18657370c15e1e893a0ab05"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a7a69cfe6e10770f82089bdd277955d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, void *SourcePtr, u32 SrcWordLength, void *DestPtr, u32 DestWordLength, u32 TransferType)</td></tr>
<tr class="separator:ga5a7a69cfe6e10770f82089bdd277955d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab7512afadad93e25630048943fd72d41"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_dcfg___config.html">XDcfg_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gab7512afadad93e25630048943fd72d41">XDcfg_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="separator:gab7512afadad93e25630048943fd72d41"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2c24756b9d6f8e81b620d27a86379e15"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga2c24756b9d6f8e81b620d27a86379e15">XDcfg_SelfTest</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:ga2c24756b9d6f8e81b620d27a86379e15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9c70f073e4522d6085c0059bc385aa9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gab9c70f073e4522d6085c0059bc385aa9">XDcfg_IntrEnable</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="separator:gab9c70f073e4522d6085c0059bc385aa9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab7606b370c10d68d61402bed68955a80"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gab7606b370c10d68d61402bed68955a80">XDcfg_IntrDisable</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="separator:gab7606b370c10d68d61402bed68955a80"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga879fec56ba0f64d3b2128f11e2b022f0"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga879fec56ba0f64d3b2128f11e2b022f0">XDcfg_IntrGetEnabled</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:ga879fec56ba0f64d3b2128f11e2b022f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ed5382e8c80a2277816a4db98a1ec6f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga9ed5382e8c80a2277816a4db98a1ec6f">XDcfg_IntrGetStatus</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:ga9ed5382e8c80a2277816a4db98a1ec6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafff047d176ced3a255248219c1278e3b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gafff047d176ced3a255248219c1278e3b">XDcfg_IntrClear</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="separator:gafff047d176ced3a255248219c1278e3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3cb50f996ae2577642b7d1b91c33105f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga3cb50f996ae2577642b7d1b91c33105f">XDcfg_InterruptHandler</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr)</td></tr>
<tr class="separator:ga3cb50f996ae2577642b7d1b91c33105f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed08df4afb0dd9c343bf994b4c18e926"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#gaed08df4afb0dd9c343bf994b4c18e926">XDcfg_SetHandler</a> (<a class="el" href="struct_x_dcfg.html">XDcfg</a> *InstancePtr, void *CallBackFunc, void *CallBackRef)</td></tr>
<tr class="separator:gaed08df4afb0dd9c343bf994b4c18e926"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga995fb32dbac8a7899c9be66a8bf7d3d1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw</a> (u32 BaseAddr)</td></tr>
<tr class="separator:ga995fb32dbac8a7899c9be66a8bf7d3d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="gaadcf2bdbe1acce8ab95b0466da519088"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_BASE_ADDRESS&#160;&#160;&#160;0xF8007000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Device Config base address. </p>

</div>
</div>
<a class="anchor" id="ga7dfcd2790e4eff2350b2c77e69bb0dbc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_DISABLE_DST_INC_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Disable Destination address increment mask. </p>

</div>
</div>
<a class="anchor" id="gaa667b16475c1b06aa123e3ea54237a65"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_DISABLE_SRC_INC_MASK&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Disable Source address increment mask. </p>

</div>
</div>
<a class="anchor" id="ga302649f2eccc0c208558a667eeb3d31b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_FIFO_3QUARTER&#160;&#160;&#160;0x2</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>3/4 empty </p>

</div>
</div>
<a class="anchor" id="ga4d79fa4095c652f0aaccc1eef6f11a3b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_FIFO_EMPTY&#160;&#160;&#160;0x4</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Empty. </p>

</div>
</div>
<a class="anchor" id="ga6d3a835786acfb7c150a51fea707af4e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_FIFO_HALF&#160;&#160;&#160;0x1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Half empty. </p>

</div>
</div>
<a class="anchor" id="gaec5cdaff00256c1b1fcbb1fd4cefbd57"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_FIFO_QUARTER&#160;&#160;&#160;0x0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Quarter empty. </p>

</div>
</div>
<a class="anchor" id="ga3fafe11b95af8da04f385c9313a6958b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_OFFSET&#160;&#160;&#160;0x08</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Configuration Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga3b46b8db6ea49d8c066fefe0d137b2c9">XDcfg_GetConfigRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga89e1eef15fcfe06cd0e8d8dd7e804ad1">XDcfg_SetConfigRegister()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1e63502ef0cc6680e3630a9a0e57efa8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_RCLK_EDGE_MASK&#160;&#160;&#160;0x00000080</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Read data active clock edge. </p>

</div>
</div>
<a class="anchor" id="ga3540b49682ec44e90f106532526cdf1d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_RFIFO_TH_MASK&#160;&#160;&#160;0x00000C00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Read FIFO Threshold Mask. </p>

</div>
</div>
<a class="anchor" id="ga648711e2e48a1fa8feadf390f213c422"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_WCLK_EDGE_MASK&#160;&#160;&#160;0x00000040</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Write data active clock edge. </p>

</div>
</div>
<a class="anchor" id="ga022faf83302e04ad191b6ee2c15ed282"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CFG_WFIFO_TH_MASK&#160;&#160;&#160;0x00000300</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Write FIFO Threshold Mask. </p>

</div>
</div>
<a class="anchor" id="gaf9a1d48578faa2caf085c0d8d7f48897"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CONFIG_RESET_VALUE&#160;&#160;&#160;0x508</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Config reg reset value. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="gae013378d19bdbab0d16fddce8707f61f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_DAP_EN_MASK&#160;&#160;&#160;0x00000007</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DAP Enable Mask. </p>

</div>
</div>
<a class="anchor" id="ga4cb6befced97425b6288e7f80a4cb882"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_DBGEN_MASK&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Invasive Debug Enable. </p>

</div>
</div>
<a class="anchor" id="gac111c754b7a79aba4ad9d66beeaaddc8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_FORCE_RST_MASK&#160;&#160;&#160;0x80000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Force into Secure Reset. </p>

</div>
</div>
<a class="anchor" id="ga2fb2e3f895a89aac522ba93e0697e078"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_JTAG_CHAIN_DIS_MASK&#160;&#160;&#160;0x00800000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>JTAG Chain Disable. </p>

</div>
</div>
<a class="anchor" id="gae54ce392946a79ecb63fefc9f6087d57"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_MULTIBOOT_EN_MASK&#160;&#160;&#160;0x01000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Multiboot Enable. </p>

</div>
</div>
<a class="anchor" id="gaee65740fa83e66131a1b706844bbc368"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_NIDEN_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Non-Invasive Debug Enable. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga2c24756b9d6f8e81b620d27a86379e15">XDcfg_SelfTest()</a>.</p>

</div>
</div>
<a class="anchor" id="ga31ebfed655e59d8ee204b253e04ee024"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_OFFSET&#160;&#160;&#160;0x00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Control Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gaeb69ef133b53618e896a4776b9e8f337">XDcfg_ClearControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga7f73a84f734f2e1996a029d8e5934b9c">XDcfg_DisablePCAP()</a>, <a class="el" href="group__devcfg__v3__3.html#gabb2094cb7d36f83c4c150a3b18e8aad0">XDcfg_EnablePCAP()</a>, <a class="el" href="group__devcfg__v3__3.html#ga81a254369eea778c17c212cc95056c26">XDcfg_GetControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>, <a class="el" href="group__devcfg__v3__3.html#gacc8c10b5cc877595c1ade09e1a589296">XDcfg_SetControlRegister()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="gade98fb162f4954144b33a71eb81a25e3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_PCAP_MODE_MASK&#160;&#160;&#160;0x04000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Enable PCAP. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga7f73a84f734f2e1996a029d8e5934b9c">XDcfg_DisablePCAP()</a>, and <a class="el" href="group__devcfg__v3__3.html#gabb2094cb7d36f83c4c150a3b18e8aad0">XDcfg_EnablePCAP()</a>.</p>

</div>
</div>
<a class="anchor" id="gaac84a7176f99dc0e1d66a53673053228"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_PCAP_PR_MASK&#160;&#160;&#160;0x08000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Enable PCAP for PR. </p>

</div>
</div>
<a class="anchor" id="ga16cb1e4072240a97799a685fad35234f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_PCAP_RATE_EN_MASK&#160;&#160;&#160;0x02000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Enable PCAP send data to FPGA every 4 PCAP cycles. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="gaabe1c3e1a3156147fdd1716d063574c0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_PCFG_AES_EN_MASK&#160;&#160;&#160;0x00000E00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>AES Enable Mask. </p>

</div>
</div>
<a class="anchor" id="gac9a915bd47631afa6954dc306283b413"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_PCFG_AES_FUSE_MASK&#160;&#160;&#160;0x00001000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>AES key source. </p>

</div>
</div>
<a class="anchor" id="gac7e72bf0cbb6551a2f74abfd265e6619"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_PCFG_POR_CNT_4K_MASK&#160;&#160;&#160;0x20000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Control PL POR timer. </p>

</div>
</div>
<a class="anchor" id="ga6b2100592757335d946e0466f84adcf9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_PCFG_PROG_B_MASK&#160;&#160;&#160;0x40000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Program signal to Reset FPGA. </p>

</div>
</div>
<a class="anchor" id="ga3ad33e86575e803961abfaf7593907e7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_SEC_EN_MASK&#160;&#160;&#160;0x00000080</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Secure/Non Secure Status mask. </p>

</div>
</div>
<a class="anchor" id="gac75c8af80babda8c6387d5b9f83e63b5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_SEU_EN_MASK&#160;&#160;&#160;0x00000100</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>SEU Enable Mask. </p>

</div>
</div>
<a class="anchor" id="ga0bc4a40162eccf50446c13b41a5deae6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_SPIDEN_MASK&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Secure Invasive Debug Enable. </p>

</div>
</div>
<a class="anchor" id="ga62d4f8110807f2ebbb148de931990a82"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_SPNIDEN_MASK&#160;&#160;&#160;0x00000040</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Secure Non Invasive Debug Enable. </p>

</div>
</div>
<a class="anchor" id="gadf49fc564c0c61b6511a171eb045e0a5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_CTRL_USER_MODE_MASK&#160;&#160;&#160;0x00008000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>User Mode Mask. </p>

</div>
</div>
<a class="anchor" id="ga24e1d08d2aa66c6fe2a8be9086ef9a41"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_DMA_DEST_ADDR_OFFSET&#160;&#160;&#160;0x1C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA Destination Address Reg. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gafda6d24be18657370c15e1e893a0ab05">XDcfg_InitiateDma()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="gaffc13cbb412f77e54b0ecf2f25e205ee"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_DMA_DEST_LEN_OFFSET&#160;&#160;&#160;0x24</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA Destination Transfer. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gafda6d24be18657370c15e1e893a0ab05">XDcfg_InitiateDma()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="ga40ccdd2b121359e65b1f95e5f32be3d8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_DMA_INVALID_ADDRESS&#160;&#160;&#160;0xFFFFFFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Invalid DMA address. </p>

</div>
</div>
<a class="anchor" id="ga73f403fdc1d3a80ff519b9aa5d8902ff"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_DMA_LEN_MASK&#160;&#160;&#160;0x7FFFFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Length Mask. </p>

</div>
</div>
<a class="anchor" id="ga18c6f2aab3a27da352296a1324ed73b4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_DMA_SRC_ADDR_OFFSET&#160;&#160;&#160;0x18</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA Source Address Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gafda6d24be18657370c15e1e893a0ab05">XDcfg_InitiateDma()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="gaaf9fa64a65762a428ba36bd38a80ab80"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_DMA_SRC_LEN_OFFSET&#160;&#160;&#160;0x20</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA Source Transfer Length. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gafda6d24be18657370c15e1e893a0ab05">XDcfg_InitiateDma()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="ga24929684d9a57ee5943c5379ba21114b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDcfg_GetPsVersion</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>
<b>Value:</b><div class="fragment"><div class="line">((<a class="code" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>((InstancePtr)-&gt;Config.BaseAddr,                 \</div>
<div class="line">                        <a class="code" href="group__devcfg__v3__3.html#ga80ad10863ac12916d347046e8263f5b2">XDCFG_MCTRL_OFFSET</a>)) &amp;                          \</div>
<div class="line">                        <a class="code" href="group__devcfg__v3__3.html#gade09d0c3fb076a8e0849d9a6acddef46">XDCFG_MCTRL_PCAP_PS_VERSION_MASK</a>) &gt;&gt;            <a class="code" href="group__devcfg__v3__3.html#ga2578e62e3b1e6e9783f523779c6d8323">\</a></div>
<div class="line"><a class="code" href="group__devcfg__v3__3.html#ga2578e62e3b1e6e9783f523779c6d8323">			XDCFG_MCTRL_PCAP_PS_VERSION_SHIFT</a></div>
<div class="ttc" id="group__devcfg__v3__3_html_gade09d0c3fb076a8e0849d9a6acddef46"><div class="ttname"><a href="group__devcfg__v3__3.html#gade09d0c3fb076a8e0849d9a6acddef46">XDCFG_MCTRL_PCAP_PS_VERSION_MASK</a></div><div class="ttdeci">#define XDCFG_MCTRL_PCAP_PS_VERSION_MASK</div><div class="ttdoc">PS Version Mask. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:412</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga77561dc2e9ea13137f50a8193b8fbcd3"><div class="ttname"><a href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a></div><div class="ttdeci">#define XDcfg_ReadReg(BaseAddr, RegOffset)</div><div class="ttdoc">Read the given register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:456</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga2578e62e3b1e6e9783f523779c6d8323"><div class="ttname"><a href="group__devcfg__v3__3.html#ga2578e62e3b1e6e9783f523779c6d8323">XDCFG_MCTRL_PCAP_PS_VERSION_SHIFT</a></div><div class="ttdeci">#define XDCFG_MCTRL_PCAP_PS_VERSION_SHIFT</div><div class="ttdoc">PS Version Shift. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:413</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga80ad10863ac12916d347046e8263f5b2"><div class="ttname"><a href="group__devcfg__v3__3.html#ga80ad10863ac12916d347046e8263f5b2">XDCFG_MCTRL_OFFSET</a></div><div class="ttdeci">#define XDCFG_MCTRL_OFFSET</div><div class="ttdoc">Miscellaneous Control Reg. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:91</div></div>
</div><!-- fragment -->
<p>Get the version number of the PS from the Miscellaneous Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance of <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> driver.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Version of the PS.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__devcfg__v3__3.html#ga24929684d9a57ee5943c5379ba21114b" title="Get the version number of the PS from the Miscellaneous Control Register. ">XDcfg_GetPsVersion(XDcfg* InstancePtr)</a> </dd></dl>

</div>
</div>
<a class="anchor" id="ga15552ab3878c35ec94749ebed5247fe5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_INT_MASK_OFFSET&#160;&#160;&#160;0x10</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Interrupt Mask Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gab7606b370c10d68d61402bed68955a80">XDcfg_IntrDisable()</a>, <a class="el" href="group__devcfg__v3__3.html#gab9c70f073e4522d6085c0059bc385aa9">XDcfg_IntrEnable()</a>, <a class="el" href="group__devcfg__v3__3.html#ga879fec56ba0f64d3b2128f11e2b022f0">XDcfg_IntrGetEnabled()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5abc2123bae0a1d3512d41be98ca477c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_INT_STS_OFFSET&#160;&#160;&#160;0x0C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Interrupt Status Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga3cb50f996ae2577642b7d1b91c33105f">XDcfg_InterruptHandler()</a>, <a class="el" href="group__devcfg__v3__3.html#gafff047d176ced3a255248219c1278e3b">XDcfg_IntrClear()</a>, <a class="el" href="group__devcfg__v3__3.html#ga9ed5382e8c80a2277816a4db98a1ec6f">XDcfg_IntrGetStatus()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="ga80a342c6002722176c408a91aa177bb2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_AXI_RERR_MASK&#160;&#160;&#160;0x00100000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>AXI Read response error. </p>

</div>
</div>
<a class="anchor" id="ga82b988804f908861e58f6c8409fb61dc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_AXI_RTO_MASK&#160;&#160;&#160;0x00200000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>AXI Read Address or response timeout. </p>

</div>
</div>
<a class="anchor" id="gaebe4d8aa713686020c2df8ef52f52486"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_AXI_WERR_MASK&#160;&#160;&#160;0x00400000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>AXI Write response error. </p>

</div>
</div>
<a class="anchor" id="gaf276d56385dd1326c99d5c70640458b8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_AXI_WTO_MASK&#160;&#160;&#160;0x00800000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>AXI Write Address or Data or response timeout. </p>

</div>
</div>
<a class="anchor" id="gae46a37df60109876c5f96d62dc6b9f78"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_D_P_DONE_MASK&#160;&#160;&#160;0x00001000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA and PCAP transfers Done. </p>

</div>
</div>
<a class="anchor" id="gadd33fcf28c9438e3a23e21571e9cc196"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_DMA_CMD_ERR_MASK&#160;&#160;&#160;0x00008000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Illegal DMA command. </p>

</div>
</div>
<a class="anchor" id="ga219beab8ecbdaa4e74c8d130b94e4ae0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_DMA_DONE_MASK&#160;&#160;&#160;0x00002000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA Command Done. </p>

</div>
</div>
<a class="anchor" id="ga66dc8e74c39f3a79b9a4260d2e5064a8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_DMA_Q_OV_MASK&#160;&#160;&#160;0x00004000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA command queue overflow. </p>

</div>
</div>
<a class="anchor" id="ga349dc6e8fe9e165ffaaf0329da6a3ca3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_P2D_LEN_ERR_MASK&#160;&#160;&#160;0x00000800</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>PCAP to DMA transfer length error. </p>

</div>
</div>
<a class="anchor" id="ga3b2eef5103e50bb1dd8cb4b3abda13f0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PCFG_CFG_RST_MASK&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>FPGA Reset mask. </p>

</div>
</div>
<a class="anchor" id="ga39c7e70832ef5a30a251342bf831f088"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PCFG_DONE_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Done Signal Mask. </p>

</div>
</div>
<a class="anchor" id="ga84c13cf9502fdc6e4b5aca232322eebb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PCFG_HMAC_ERR_MASK&#160;&#160;&#160;0x00000040</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>HMAC error mask. </p>

</div>
</div>
<a class="anchor" id="ga5ae21c6f80c245ea0085c5e5645703f1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PCFG_INIT_NE_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Detect Negative edge of Init Signal. </p>

</div>
</div>
<a class="anchor" id="gaa818ba9c2de5717835e855fba4756dce"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PCFG_INIT_PE_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Detect Positive edge of Init Signal. </p>

</div>
</div>
<a class="anchor" id="gafddabfd06735e901077dcb54ac83e23a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PCFG_POR_B_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>FPGA POR mask. </p>

</div>
</div>
<a class="anchor" id="ga3b85bf633686d74c21c9358be8497095"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PCFG_SEU_ERR_MASK&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>SEU Error mask. </p>

</div>
</div>
<a class="anchor" id="ga36eedd2831c6dae36cd432921d34b5f0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PSS_CFG_RESET_B_MASK&#160;&#160;&#160;0x08000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>PL configuration reset. </p>

</div>
</div>
<a class="anchor" id="gad806a28b37776eb5714cca5e47ebf51a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PSS_FST_CFG_B_MASK&#160;&#160;&#160;0x40000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>First configuration done. </p>

</div>
</div>
<a class="anchor" id="gaae0cdad7bf3b52dbf8fa6009492257e5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PSS_GPWRDWN_B_MASK&#160;&#160;&#160;0x20000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Global power down. </p>

</div>
</div>
<a class="anchor" id="ga2850a459bed5fde0901bc16ae41fcf72"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PSS_GTS_CFG_B_MASK&#160;&#160;&#160;0x10000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Tri-state IO during configuration. </p>

</div>
</div>
<a class="anchor" id="gaa150109448e0dae4f63c97e8d4835ac4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_PSS_GTS_USR_B_MASK&#160;&#160;&#160;0x80000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Tri-state IO during HIZ. </p>

</div>
</div>
<a class="anchor" id="ga8d2b8bff7a8acef986264a348153d7ec"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_RD_FIFO_LVL_MASK&#160;&#160;&#160;0x00010000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Rx FIFO greater than threshold. </p>

</div>
</div>
<a class="anchor" id="gafd279fe5c6af5cb49cb22efe8487288b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_RX_FIFO_OV_MASK&#160;&#160;&#160;0x00040000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Rx FIFO Overflow. </p>

</div>
</div>
<a class="anchor" id="ga4d0f39a67ebecfe3208f90adb975c164"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_IXR_WR_FIFO_LVL_MASK&#160;&#160;&#160;0x00020000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Tx FIFO less than threshold. </p>

</div>
</div>
<a class="anchor" id="gab3ad8e8bf58fb796d3b6359cf276a0eb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_LOCK_AES_EFUSE_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Lock AES Efuse bit. </p>

</div>
</div>
<a class="anchor" id="gad4c541e7e72c1d43d9b5fd5aa8ae2c85"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_LOCK_AES_EN_MASK&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Lock AES_EN update. </p>

</div>
</div>
<a class="anchor" id="ga02c2ca7416d5d3f208a15ca865f33f40"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_LOCK_DBG_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>This bit locks security config including: DAP_En, DBGEN,, NIDEN, SPNIEN. </p>

</div>
</div>
<a class="anchor" id="gad126a845b17979d640cd2dd00eab29f9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_LOCK_OFFSET&#160;&#160;&#160;0x04</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Lock Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gad3df072e27abfff9beb69cb09567a8c1">XDcfg_GetLockRegister()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga1e0516cd9cdc5066e98e3c3c195c1d3c">XDcfg_SetLockRegister()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7061616f307b1f98ab4b6945664333ad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_LOCK_SEC_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Lock SEC_EN and USER_MODE. </p>

</div>
</div>
<a class="anchor" id="ga245a296585dd3c08615b96a319e75026"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_LOCK_SEU_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Lock SEU_En update. </p>

</div>
</div>
<a class="anchor" id="ga80ad10863ac12916d347046e8263f5b2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_MCTRL_OFFSET&#160;&#160;&#160;0x80</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Miscellaneous Control Reg. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gaee0dfc6838f33d700fc4b8a5549b0473">XDcfg_GetMiscControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>, <a class="el" href="group__devcfg__v3__3.html#ga2739b6bce23b6e02a9076c0eba8664d4">XDcfg_SetMiscControlRegister()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa5d7d25bc3d66e24bce45553e863b731"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_MCTRL_PCAP_LPBK_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>PCAP loopback mask. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="gade09d0c3fb076a8e0849d9a6acddef46"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_MCTRL_PCAP_PS_VERSION_MASK&#160;&#160;&#160;0xF0000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>PS Version Mask. </p>

</div>
</div>
<a class="anchor" id="ga2578e62e3b1e6e9783f523779c6d8323"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_MCTRL_PCAP_PS_VERSION_SHIFT&#160;&#160;&#160;28</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>PS Version Shift. </p>

</div>
</div>
<a class="anchor" id="gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_MULTIBOOT_ADDR_OFFSET&#160;&#160;&#160;0x2C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Multi BootAddress Pointer. </p>

</div>
</div>
<a class="anchor" id="ga49f0c43c6fdeb7eff99095fffc5c18e9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDcfg_ReadMultiBootConfig</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>((InstancePtr)-&gt;Config.BaseAddr,           \</div>
<div class="line">                        <a class="code" href="group__devcfg__v3__3.html#gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59">XDCFG_MULTIBOOT_ADDR_OFFSET</a>)</div>
<div class="ttc" id="group__devcfg__v3__3_html_gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59"><div class="ttname"><a href="group__devcfg__v3__3.html#gafe5bf5a7eb6a4d2e8d5a7a9cc8f60d59">XDCFG_MULTIBOOT_ADDR_OFFSET</a></div><div class="ttdeci">#define XDCFG_MULTIBOOT_ADDR_OFFSET</div><div class="ttdoc">Multi BootAddress Pointer. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:88</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga77561dc2e9ea13137f50a8193b8fbcd3"><div class="ttname"><a href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a></div><div class="ttdeci">#define XDcfg_ReadReg(BaseAddr, RegOffset)</div><div class="ttdoc">Read the given register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:456</div></div>
</div><!-- fragment -->
<p>Read the multiboot config register value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance of <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> driver.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: u32 <a class="el" href="group__devcfg__v3__3.html#ga49f0c43c6fdeb7eff99095fffc5c18e9" title="Read the multiboot config register value. ">XDcfg_ReadMultiBootConfig(XDcfg* InstancePtr)</a> </dd></dl>

</div>
</div>
<a class="anchor" id="ga77561dc2e9ea13137f50a8193b8fbcd3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDcfg_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;Xil_In32((BaseAddr) + (RegOffset))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Read the given register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddr</td><td>is the base address of the device </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset to be read</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The 32-bit value of the register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: u32 <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3" title="Read the given register. ">XDcfg_ReadReg(u32 BaseAddr, u32 RegOffset)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gaeb69ef133b53618e896a4776b9e8f337">XDcfg_ClearControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga7f73a84f734f2e1996a029d8e5934b9c">XDcfg_DisablePCAP()</a>, <a class="el" href="group__devcfg__v3__3.html#gabb2094cb7d36f83c4c150a3b18e8aad0">XDcfg_EnablePCAP()</a>, <a class="el" href="group__devcfg__v3__3.html#ga3b46b8db6ea49d8c066fefe0d137b2c9">XDcfg_GetConfigRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga81a254369eea778c17c212cc95056c26">XDcfg_GetControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#gad3df072e27abfff9beb69cb09567a8c1">XDcfg_GetLockRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#gaee0dfc6838f33d700fc4b8a5549b0473">XDcfg_GetMiscControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga5573651d2f14ff760e36d551a49fa919">XDcfg_GetSoftwareIdRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#gaaacacd5169ad7a79f09d08858f58dc8e">XDcfg_GetStatusRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga3cb50f996ae2577642b7d1b91c33105f">XDcfg_InterruptHandler()</a>, <a class="el" href="group__devcfg__v3__3.html#gab7606b370c10d68d61402bed68955a80">XDcfg_IntrDisable()</a>, <a class="el" href="group__devcfg__v3__3.html#gab9c70f073e4522d6085c0059bc385aa9">XDcfg_IntrEnable()</a>, <a class="el" href="group__devcfg__v3__3.html#ga879fec56ba0f64d3b2128f11e2b022f0">XDcfg_IntrGetEnabled()</a>, <a class="el" href="group__devcfg__v3__3.html#ga9ed5382e8c80a2277816a4db98a1ec6f">XDcfg_IntrGetStatus()</a>, <a class="el" href="group__devcfg__v3__3.html#gab3412c2881ffaa15fd3615770a4225a7">XDcfg_IsDmaBusy()</a>, <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>, <a class="el" href="group__devcfg__v3__3.html#gacc8c10b5cc877595c1ade09e1a589296">XDcfg_SetControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga2739b6bce23b6e02a9076c0eba8664d4">XDcfg_SetMiscControlRegister()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="ga895856e5cf4578a328a12bb0f0287826"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_ROM_SHADOW_OFFSET&#160;&#160;&#160;0x28</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA ROM Shadow Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga332a5c7c856e8f6637cafaa3ec69eaca">XDcfg_SetRomShadowRegister()</a>.</p>

</div>
</div>
<a class="anchor" id="ga16c0f3e337e8ebeb09d71c8b717a9018"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDcfg_SelectIcapInterface</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>((InstancePtr)-&gt;Config.BaseAddr, <a class="code" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>,   \</div>
<div class="line">        ((<a class="code" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>((InstancePtr)-&gt;Config.BaseAddr, <a class="code" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>)) \</div>
<div class="line">        &amp; ( ~<a class="code" href="group__devcfg__v3__3.html#gaac84a7176f99dc0e1d66a53673053228">XDCFG_CTRL_PCAP_PR_MASK</a>)))</div>
<div class="ttc" id="group__devcfg__v3__3_html_ga31ebfed655e59d8ee204b253e04ee024"><div class="ttname"><a href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a></div><div class="ttdeci">#define XDCFG_CTRL_OFFSET</div><div class="ttdoc">Control Register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:77</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga77561dc2e9ea13137f50a8193b8fbcd3"><div class="ttname"><a href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a></div><div class="ttdeci">#define XDcfg_ReadReg(BaseAddr, RegOffset)</div><div class="ttdoc">Read the given register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:456</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga8ae617fbb2b3e148a8b2489e90fbdea3"><div class="ttname"><a href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a></div><div class="ttdeci">#define XDcfg_WriteReg(BaseAddr, RegOffset, Data)</div><div class="ttdoc">Write to the given register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:474</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_gaac84a7176f99dc0e1d66a53673053228"><div class="ttname"><a href="group__devcfg__v3__3.html#gaac84a7176f99dc0e1d66a53673053228">XDCFG_CTRL_PCAP_PR_MASK</a></div><div class="ttdeci">#define XDCFG_CTRL_PCAP_PR_MASK</div><div class="ttdoc">Enable PCAP for PR. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:110</div></div>
</div><!-- fragment -->
<p>Selects ICAP interface for reconfiguration after the initial configuration of the PL. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance of <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> driver.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__devcfg__v3__3.html#ga16c0f3e337e8ebeb09d71c8b717a9018" title="Selects ICAP interface for reconfiguration after the initial configuration of the PL...">XDcfg_SelectIcapInterface(XDcfg* InstancePtr)</a> </dd></dl>

</div>
</div>
<a class="anchor" id="ga36775aac99e72ec7459fba541e90c5be"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDcfg_SelectPcapInterface</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>((InstancePtr)-&gt;Config.BaseAddr, <a class="code" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>,    \</div>
<div class="line">        ((<a class="code" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>((InstancePtr)-&gt;Config.BaseAddr, <a class="code" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>))  \</div>
<div class="line">        | <a class="code" href="group__devcfg__v3__3.html#gaac84a7176f99dc0e1d66a53673053228">XDCFG_CTRL_PCAP_PR_MASK</a>))</div>
<div class="ttc" id="group__devcfg__v3__3_html_ga31ebfed655e59d8ee204b253e04ee024"><div class="ttname"><a href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a></div><div class="ttdeci">#define XDCFG_CTRL_OFFSET</div><div class="ttdoc">Control Register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:77</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga77561dc2e9ea13137f50a8193b8fbcd3"><div class="ttname"><a href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a></div><div class="ttdeci">#define XDcfg_ReadReg(BaseAddr, RegOffset)</div><div class="ttdoc">Read the given register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:456</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga8ae617fbb2b3e148a8b2489e90fbdea3"><div class="ttname"><a href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a></div><div class="ttdeci">#define XDcfg_WriteReg(BaseAddr, RegOffset, Data)</div><div class="ttdoc">Write to the given register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:474</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_gaac84a7176f99dc0e1d66a53673053228"><div class="ttname"><a href="group__devcfg__v3__3.html#gaac84a7176f99dc0e1d66a53673053228">XDCFG_CTRL_PCAP_PR_MASK</a></div><div class="ttdeci">#define XDCFG_CTRL_PCAP_PR_MASK</div><div class="ttdoc">Enable PCAP for PR. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:110</div></div>
</div><!-- fragment -->
<p>Selects PCAP interface for reconfiguration after the initial configuration of the PL. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance of <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> driver.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__devcfg__v3__3.html#ga36775aac99e72ec7459fba541e90c5be" title="Selects PCAP interface for reconfiguration after the initial configuration of the PL...">XDcfg_SelectPcapInterface(XDcfg* InstancePtr)</a> </dd></dl>

</div>
</div>
<a class="anchor" id="gad26b8675cf6625f83b93e5d8f41f1065"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_DMA_CMD_Q_E_MASK&#160;&#160;&#160;0x40000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA command Queue empty. </p>

</div>
</div>
<a class="anchor" id="ga48a0c155d061c98656101cb19a87f0a0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_DMA_CMD_Q_F_MASK&#160;&#160;&#160;0x80000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>DMA command Queue full. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gab3412c2881ffaa15fd3615770a4225a7">XDcfg_IsDmaBusy()</a>.</p>

</div>
</div>
<a class="anchor" id="gaff5f9c1fa417a9544adf896282d205b9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_DMA_DONE_CNT_MASK&#160;&#160;&#160;0x30000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Number of completed DMA transfers. </p>

</div>
</div>
<a class="anchor" id="gafb4c8340ab30a1cd2c683dd12c1e44eb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_EFUSE_BBRAM_KEY_DISABLE_MASK&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>BBRAM key disable. </p>

</div>
</div>
<a class="anchor" id="gaaabb6a4426bae09df68669a1bec2b769"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_EFUSE_JTAG_DIS_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>EFuse JTAG Disable status. </p>

</div>
</div>
<a class="anchor" id="gacca94ac04133576c96fb1083d234638b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_EFUSE_SEC_EN_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Efuse Security Enable Status. </p>

</div>
</div>
<a class="anchor" id="gad4508fc28f5b539b7214e239591809fd"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_ILLEGAL_APB_ACCESS_MASK&#160;&#160;&#160;0x00000040</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Illegal APB access. </p>

</div>
</div>
<a class="anchor" id="ga6646b7874a5c9cc7bcdba6072bb4ff72"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_OFFSET&#160;&#160;&#160;0x14</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Status Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gaaacacd5169ad7a79f09d08858f58dc8e">XDcfg_GetStatusRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#gab3412c2881ffaa15fd3615770a4225a7">XDcfg_IsDmaBusy()</a>, <a class="el" href="group__devcfg__v3__3.html#gae7a3e8052f73c370990b77dae5751a36">XDcfg_SetStatusRegister()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="ga2adb521e9dab8223c16f2ebbfccc830f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_PCFG_INIT_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>FPGA Init Status. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1568dc0a278536df9687278619c74474"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_PSS_CFG_RESET_B&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>PL config reset status. </p>

</div>
</div>
<a class="anchor" id="gab8f00411613dddd1742c39696388c3fc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_PSS_FST_CFG_B&#160;&#160;&#160;0x00000400</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>First PL config done. </p>

</div>
</div>
<a class="anchor" id="ga4fb070b786553db7ff88deadab2bb6cb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_PSS_GPWRDWN_B&#160;&#160;&#160;0x00000200</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Global power down. </p>

</div>
</div>
<a class="anchor" id="ga339bdad1a39196eaef22c9453f60a6f1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_PSS_GTS_CFG_B&#160;&#160;&#160;0x00000100</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Tri-state IO during config. </p>

</div>
</div>
<a class="anchor" id="ga3a8789bdbea24952f5301d75fcff272a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_PSS_GTS_USR_B&#160;&#160;&#160;0x00000800</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Tri-state IO during HIZ. </p>

</div>
</div>
<a class="anchor" id="ga78f9aed2cc9225155a3414f117519bf0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_RX_FIFO_LVL_MASK&#160;&#160;&#160;0x01F000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Rx FIFO level. </p>

</div>
</div>
<a class="anchor" id="ga7e4cdd2d6218376746d4f73232b1935d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_SECURE_RST_MASK&#160;&#160;&#160;0x00000080</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Secure Reset POR Status. </p>

</div>
</div>
<a class="anchor" id="ga5fafa4549ef417021328567aca7fa549"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_STATUS_TX_FIFO_LVL_MASK&#160;&#160;&#160;0x0007F000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Tx FIFO level. </p>

</div>
</div>
<a class="anchor" id="gad56285ef89202c084bad1724cc3f8df1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_SW_ID_OFFSET&#160;&#160;&#160;0x30</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Software ID Register. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga5573651d2f14ff760e36d551a49fa919">XDcfg_GetSoftwareIdRegister()</a>.</p>

</div>
</div>
<a class="anchor" id="ga2ed83e25f13a262faf75dfd55bae3522"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDcfg_Unlock</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>
<b>Value:</b><div class="fragment"><div class="line"><a class="code" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>((InstancePtr)-&gt;Config.BaseAddr,                  \</div>
<div class="line">        <a class="code" href="group__devcfg__v3__3.html#ga7dfcf6697edba5f229b22fc33d614363">XDCFG_UNLOCK_OFFSET</a>, <a class="code" href="group__devcfg__v3__3.html#ga2830ab27372d4841a56ae22b06aa1f9a">XDCFG_UNLOCK_DATA</a>)</div>
<div class="ttc" id="group__devcfg__v3__3_html_ga2830ab27372d4841a56ae22b06aa1f9a"><div class="ttname"><a href="group__devcfg__v3__3.html#ga2830ab27372d4841a56ae22b06aa1f9a">XDCFG_UNLOCK_DATA</a></div><div class="ttdeci">#define XDCFG_UNLOCK_DATA</div><div class="ttdoc">First APB access data. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:430</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga7dfcf6697edba5f229b22fc33d614363"><div class="ttname"><a href="group__devcfg__v3__3.html#ga7dfcf6697edba5f229b22fc33d614363">XDCFG_UNLOCK_OFFSET</a></div><div class="ttdeci">#define XDCFG_UNLOCK_OFFSET</div><div class="ttdoc">Unlock Register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:90</div></div>
<div class="ttc" id="group__devcfg__v3__3_html_ga8ae617fbb2b3e148a8b2489e90fbdea3"><div class="ttname"><a href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a></div><div class="ttdeci">#define XDcfg_WriteReg(BaseAddr, RegOffset, Data)</div><div class="ttdoc">Write to the given register. </div><div class="ttdef"><b>Definition:</b> xdevcfg_hw.h:474</div></div>
</div><!-- fragment -->
<p>Unlock the Device Config Interface block. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the instance of <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> driver.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__devcfg__v3__3.html#ga2ed83e25f13a262faf75dfd55bae3522" title="Unlock the Device Config Interface block. ">XDcfg_Unlock(XDcfg* InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gafcaaa8ac67cf7316c54d1cba36e83e08">XDcfg_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="ga2830ab27372d4841a56ae22b06aa1f9a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_UNLOCK_DATA&#160;&#160;&#160;0x757BDF0D</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>First APB access data. </p>

</div>
</div>
<a class="anchor" id="ga7dfcf6697edba5f229b22fc33d614363"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDCFG_UNLOCK_OFFSET&#160;&#160;&#160;0x34</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Unlock Register. </p>

</div>
</div>
<a class="anchor" id="ga8ae617fbb2b3e148a8b2489e90fbdea3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XDcfg_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;Xil_Out32((BaseAddr) + (RegOffset), (Data))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>&gt;</code></p>

<p>Write to the given register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddr</td><td>is the base address of the device </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset to be written </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32-bit value to write to the register</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3" title="Write to the given register. ">XDcfg_WriteReg(u32 BaseAddr, u32 RegOffset, u32 Data)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gaeb69ef133b53618e896a4776b9e8f337">XDcfg_ClearControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga7f73a84f734f2e1996a029d8e5934b9c">XDcfg_DisablePCAP()</a>, <a class="el" href="group__devcfg__v3__3.html#gabb2094cb7d36f83c4c150a3b18e8aad0">XDcfg_EnablePCAP()</a>, <a class="el" href="group__devcfg__v3__3.html#gafda6d24be18657370c15e1e893a0ab05">XDcfg_InitiateDma()</a>, <a class="el" href="group__devcfg__v3__3.html#ga3cb50f996ae2577642b7d1b91c33105f">XDcfg_InterruptHandler()</a>, <a class="el" href="group__devcfg__v3__3.html#gafff047d176ced3a255248219c1278e3b">XDcfg_IntrClear()</a>, <a class="el" href="group__devcfg__v3__3.html#gab7606b370c10d68d61402bed68955a80">XDcfg_IntrDisable()</a>, <a class="el" href="group__devcfg__v3__3.html#gab9c70f073e4522d6085c0059bc385aa9">XDcfg_IntrEnable()</a>, <a class="el" href="group__devcfg__v3__3.html#ga995fb32dbac8a7899c9be66a8bf7d3d1">XDcfg_ResetHw()</a>, <a class="el" href="group__devcfg__v3__3.html#ga89e1eef15fcfe06cd0e8d8dd7e804ad1">XDcfg_SetConfigRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#gacc8c10b5cc877595c1ade09e1a589296">XDcfg_SetControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga1e0516cd9cdc5066e98e3c3c195c1d3c">XDcfg_SetLockRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga2739b6bce23b6e02a9076c0eba8664d4">XDcfg_SetMiscControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga332a5c7c856e8f6637cafaa3ec69eaca">XDcfg_SetRomShadowRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#gae7a3e8052f73c370990b77dae5751a36">XDcfg_SetStatusRegister()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<h2 class="groupheader">Typedef Documentation</h2>
<a class="anchor" id="gacaa24b2920f1bc5b56662062f2c380e0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">typedef void(* XDcfg_IntrHandler) (void *CallBackRef, u32 Status)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>The handler data type allows the user to define a callback function to respond to interrupt events in the system. </p>
<p>This function is executed in interrupt context, so amount of processing should be minimized.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>is the callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is unimportant to the driver component, so it is a void pointer. </td></tr>
    <tr><td class="paramname">Status</td><td>is the Interrupt status of the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> device. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a class="anchor" id="gafcaaa8ac67cf7316c54d1cba36e83e08"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int XDcfg_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg___config.html">XDcfg_Config</a> *&#160;</td>
          <td class="paramname"><em>ConfigPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>EffectiveAddress</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>Initialize the Device Config Interface driver. </p>
<p>This function must be called before other functions of the driver are called.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">ConfigPtr</td><td>is the config structure. </td></tr>
    <tr><td class="paramname">EffectiveAddress</td><td>is the base address for the device. It could be a virtual address if address translation is supported in the system, otherwise it is the physical address.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if initialization was successful.</li>
<li>XST_DEVICE_IS_STARTED if the device has already been started.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The very first APB access to the Device Configuration Interface block needs to be a write to the UNLOCK register with the value of 0x757BDF0D. This step is to be done once after reset, any other APB access has to come after this. The APB access is considered illegal if the step is not done or if it is done incorrectly. Furthermore, if any of efuse_sec_cfg[5:0] is high, the following additional actions would be carried out. In other words, if all bits are low, the following steps are not done. 1. AES is disabled 2. All APB writes disabled 3. SoC debug fully enabled </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg___config.html#aed08774c7a83a68bf1af0188a80bb62f">XDcfg_Config::DeviceId</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="struct_x_dcfg.html#a8c0b292203540ec4fa43ef3a8b633bbd">XDcfg::IsStarted</a>, and <a class="el" href="group__devcfg__v3__3.html#ga2ed83e25f13a262faf75dfd55bae3522">XDcfg_Unlock</a>.</p>

</div>
</div>
<a class="anchor" id="gaeb69ef133b53618e896a4776b9e8f337"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_ClearControlRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function Clears the specified bit positions of the Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the 32 bit value which holds the bit positions to be cleared.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga7f73a84f734f2e1996a029d8e5934b9c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_DisablePCAP </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The functions disables the PCAP interface by clearing the PCAP mode bit in the control register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gade98fb162f4954144b33a71eb81a25e3">XDCFG_CTRL_PCAP_MODE_MASK</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gabb2094cb7d36f83c4c150a3b18e8aad0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_EnablePCAP </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The functions enables the PCAP interface by setting the PCAP mode bit in the control register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Enable FPGA programming from PCAP interface. Enabling this bit disables all the external interfaces from programming of FPGA except for ICAP. The user needs to ensure that the FPGA is programmed through either PCAP or ICAP. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gade98fb162f4954144b33a71eb81a25e3">XDCFG_CTRL_PCAP_MODE_MASK</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga3b46b8db6ea49d8c066fefe0d137b2c9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_GetConfigRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function reads the contents of the Configuration Register with the given value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 32-bit value representing the contents of the Config Register. Use the XDCFG_CFG_*_MASK constants defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a> to interpret the returned value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga3fafe11b95af8da04f385c9313a6958b">XDCFG_CFG_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga81a254369eea778c17c212cc95056c26"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_GetControlRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function reads the contents of the Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 32-bit value representing the contents of the Control Register. Use the XDCFG_CTRL_*_MASK constants defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a> to interpret the returned value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga2c24756b9d6f8e81b620d27a86379e15">XDcfg_SelfTest()</a>.</p>

</div>
</div>
<a class="anchor" id="gad3df072e27abfff9beb69cb09567a8c1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_GetLockRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function reads the contents of the Lock Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 32-bit value representing the contents of the Lock Register. Use the XDCFG_CR_*_MASK constants defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a> to interpret the returned value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#gad126a845b17979d640cd2dd00eab29f9">XDCFG_LOCK_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="gaee0dfc6838f33d700fc4b8a5549b0473"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_GetMiscControlRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function reads the contents of the Miscellaneous Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>32 Bit boot software ID.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This register is locked for write once the system enters usermode. Hence API to reading the register only is provided. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga80ad10863ac12916d347046e8263f5b2">XDCFG_MCTRL_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga5573651d2f14ff760e36d551a49fa919"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_GetSoftwareIdRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function reads the contents of the Software ID Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>32 Bit boot software ID.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This register is locked for write once the system enters usermode. Hence API for reading the register only is provided. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#gad56285ef89202c084bad1724cc3f8df1">XDCFG_SW_ID_OFFSET</a>.</p>

</div>
</div>
<a class="anchor" id="gaaacacd5169ad7a79f09d08858f58dc8e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_GetStatusRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function reads the contents of the Status Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 32-bit value representing the contents of the Status Register. Use the XDCFG_STATUS_*_MASK constants defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a> to interpret the returned value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga6646b7874a5c9cc7bcdba6072bb4ff72">XDCFG_STATUS_OFFSET</a>.</p>

</div>
</div>
<a class="anchor" id="gafda6d24be18657370c15e1e893a0ab05"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_InitiateDma </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>SourcePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DestPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>SrcWordLength</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DestWordLength</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>This function initiates the DMA transfer. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">SourcePtr</td><td>contains a pointer to the source memory where the data is to be transferred from. </td></tr>
    <tr><td class="paramname">SrcWordLength</td><td>is the number of words (32 bit) to be transferred for the source transfer. </td></tr>
    <tr><td class="paramname">DestPtr</td><td>contains a pointer to the destination memory where the data is to be transferred to. </td></tr>
    <tr><td class="paramname">DestWordLength</td><td>is the number of words (32 bit) to be transferred for the Destination transfer.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>It is the responsibility of the caller function to ensure that correct values are passed to this function.</dd></dl>
<p>The 2 LSBs of the SourcePtr (Source)/ DestPtr (Destination) address when equal to 2�b01 indicates the last DMA command of an overall transfer. </p>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="group__devcfg__v3__3.html#ga24e1d08d2aa66c6fe2a8be9086ef9a41">XDCFG_DMA_DEST_ADDR_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gaffc13cbb412f77e54b0ecf2f25e205ee">XDCFG_DMA_DEST_LEN_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga18c6f2aab3a27da352296a1324ed73b4">XDCFG_DMA_SRC_ADDR_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gaaf9fa64a65762a428ba36bd38a80ab80">XDCFG_DMA_SRC_LEN_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="ga3cb50f996ae2577642b7d1b91c33105f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_InterruptHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>The interrupt handler for the Device Config Interface. </p>
<p>Events are signaled to upper layer for proper handling.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga5abc2123bae0a1d3512d41be98ca477c">XDCFG_INT_STS_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gafff047d176ced3a255248219c1278e3b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_IntrClear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>This function clears the specified interrupts in the Interrupt Status Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the bit-mask of the interrupts to be cleared. Bit positions of 1 will be cleared. Bit positions of 0 will not change the previous interrupt status. This mask is formed by OR'ing XDCFG_INT_* bits which are defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga5abc2123bae0a1d3512d41be98ca477c">XDCFG_INT_STS_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gab7606b370c10d68d61402bed68955a80"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_IntrDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>This function disables the specified interrupts in the device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the bit-mask of the interrupts to be disabled. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XDCFG_INT_* bits defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga15552ab3878c35ec94749ebed5247fe5">XDCFG_INT_MASK_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gab9c70f073e4522d6085c0059bc385aa9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_IntrEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>This function enables the specified interrupts in the device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the bit-mask of the interrupts to be enabled. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XDCFG_INT_* bits defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga15552ab3878c35ec94749ebed5247fe5">XDCFG_INT_MASK_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga879fec56ba0f64d3b2128f11e2b022f0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_IntrGetEnabled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>This function returns the enabled interrupts read from the Interrupt Mask Register. </p>
<p>Use the XDCFG_INT_* constants defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a> to interpret the returned value.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 32-bit value representing the contents of the IMR.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga15552ab3878c35ec94749ebed5247fe5">XDCFG_INT_MASK_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga9ed5382e8c80a2277816a4db98a1ec6f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_IntrGetStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>This function returns the interrupt status read from Interrupt Status Register. </p>
<p>Use the XDCFG_INT_* constants defined in <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a> to interpret the returned value.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 32-bit value representing the contents of the Interrupt Status register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga5abc2123bae0a1d3512d41be98ca477c">XDCFG_INT_STS_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>.</p>

</div>
</div>
<a class="anchor" id="gab3412c2881ffaa15fd3615770a4225a7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_IsDmaBusy </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>This function checks if DMA command queue is full. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS is the DMA is busy XST_FAILURE if the DMA is idle</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The DMA queue has a depth of two. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, <a class="el" href="group__devcfg__v3__3.html#ga48a0c155d061c98656101cb19a87f0a0">XDCFG_STATUS_DMA_CMD_Q_F_MASK</a>, and <a class="el" href="group__devcfg__v3__3.html#ga6646b7874a5c9cc7bcdba6072bb4ff72">XDCFG_STATUS_OFFSET</a>.</p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="gab7512afadad93e25630048943fd72d41"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_dcfg___config.html">XDcfg_Config</a> * XDcfg_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>Lookup the device configuration based on the unique device ID. </p>
<p>The table contains the configuration info for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>is the unique device ID of the device being looked up.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__devcfg__v3__3.html#ga77946de6f18b07bd6c24fdd084ab5395">XDcfg_ConfigTable</a>.</p>

</div>
</div>
<a class="anchor" id="ga995fb32dbac8a7899c9be66a8bf7d3d1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_ResetHw </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BaseAddr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__hw_8c.html">xdevcfg_hw.c</a>&gt;</code></p>

<p>This function perform the reset sequence to the given devcfg interface by configuring the appropriate control bits in the devcfg specifc registers the devcfg reset squence involves the following steps Disable all the interuupts Clear the status Update relevant config registers with reset values Disbale the looopback mode and pcap rate enable. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>of the interface</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>N/A</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function will not modify the slcr registers that are relavant for devcfg controller </dd></dl>

<p>References <a class="el" href="group__devcfg__v3__3.html#ga3fafe11b95af8da04f385c9313a6958b">XDCFG_CFG_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gaf9a1d48578faa2caf085c0d8d7f48897">XDCFG_CONFIG_RESET_VALUE</a>, <a class="el" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga16cb1e4072240a97799a685fad35234f">XDCFG_CTRL_PCAP_RATE_EN_MASK</a>, <a class="el" href="group__devcfg__v3__3.html#ga24e1d08d2aa66c6fe2a8be9086ef9a41">XDCFG_DMA_DEST_ADDR_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gaffc13cbb412f77e54b0ecf2f25e205ee">XDCFG_DMA_DEST_LEN_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga18c6f2aab3a27da352296a1324ed73b4">XDCFG_DMA_SRC_ADDR_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gaaf9fa64a65762a428ba36bd38a80ab80">XDCFG_DMA_SRC_LEN_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga15552ab3878c35ec94749ebed5247fe5">XDCFG_INT_MASK_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga5abc2123bae0a1d3512d41be98ca477c">XDCFG_INT_STS_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga80ad10863ac12916d347046e8263f5b2">XDCFG_MCTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gaa5d7d25bc3d66e24bce45553e863b731">XDCFG_MCTRL_PCAP_LPBK_MASK</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga2c24756b9d6f8e81b620d27a86379e15"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int XDcfg_SelfTest </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>Run a self-test on the Device Configuration Interface. </p>
<p>This test does a control register write and reads back the same value.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if self-test was successful.</li>
<li>XST_FAILURE if fails.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#gaee65740fa83e66131a1b706844bbc368">XDCFG_CTRL_NIDEN_MASK</a>, <a class="el" href="group__devcfg__v3__3.html#ga81a254369eea778c17c212cc95056c26">XDcfg_GetControlRegister()</a>, and <a class="el" href="group__devcfg__v3__3.html#gacc8c10b5cc877595c1ade09e1a589296">XDcfg_SetControlRegister()</a>.</p>

</div>
</div>
<a class="anchor" id="ga89e1eef15fcfe06cd0e8d8dd7e804ad1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_SetConfigRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function sets the contents of the Configuration Register with the given value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32 bit data to be written to the Register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga3fafe11b95af8da04f385c9313a6958b">XDCFG_CFG_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gacc8c10b5cc877595c1ade09e1a589296"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_SetControlRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function sets the contents of the Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the 32 bit mask data to be written to the Register. The mask definitions are defined in the <a class="el" href="xdevcfg__hw_8h.html">xdevcfg_hw.h</a> file.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#ga2c24756b9d6f8e81b620d27a86379e15">XDcfg_SelfTest()</a>, and <a class="el" href="group__devcfg__v3__3.html#ga5a7a69cfe6e10770f82089bdd277955d">XDcfg_Transfer()</a>.</p>

</div>
</div>
<a class="anchor" id="gaed08df4afb0dd9c343bf994b4c18e926"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_SetHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8h.html">xdevcfg.h</a>&gt;</code></p>

<p>This function sets the handler that will be called when an event (interrupt) occurs that needs application's attention. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance </td></tr>
    <tr><td class="paramname">CallBackFunc</td><td>is the address of the callback function. </td></tr>
    <tr><td class="paramname">CallBackRef</td><td>is a user data item that will be passed to the callback function when it is invoked.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>.</p>

</div>
</div>
<a class="anchor" id="ga1e0516cd9cdc5066e98e3c3c195c1d3c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_SetLockRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function sets the contents of the Lock Register. </p>
<p>These bits can only be set to a 1. They will be cleared after a Power On Reset.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32 bit data to be written to the Register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#gad126a845b17979d640cd2dd00eab29f9">XDCFG_LOCK_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga2739b6bce23b6e02a9076c0eba8664d4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_SetMiscControlRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function sets the bit mask for the feature in Miscellaneous Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the bit-mask of the feature to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga80ad10863ac12916d347046e8263f5b2">XDCFG_MCTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga332a5c7c856e8f6637cafaa3ec69eaca"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_SetRomShadowRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function sets the contents of the ROM Shadow Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32 bit data to be written to the Register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This register is can only be written and is used to control the RAM shadow of 32 bit 4K page ROM pages in user mode </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga895856e5cf4578a328a12bb0f0287826">XDCFG_ROM_SHADOW_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="gae7a3e8052f73c370990b77dae5751a36"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void XDcfg_SetStatusRegister </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>The function sets the contents of the Status Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32 bit data to be written to the Register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga6646b7874a5c9cc7bcdba6072bb4ff72">XDCFG_STATUS_OFFSET</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<a class="anchor" id="ga5a7a69cfe6e10770f82089bdd277955d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XDcfg_Transfer </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dcfg.html">XDcfg</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>SourcePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>SrcWordLength</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>DestPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DestWordLength</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>TransferType</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg_8c.html">xdevcfg.c</a>&gt;</code></p>

<p>This function starts the DMA transfer. </p>
<p>This function only starts the operation and returns before the operation may be completed. If the interrupt is enabled, an interrupt will be generated when the operation is completed, otherwise it is necessary to poll the Status register to determine when it is completed. It is the responsibility of the caller to determine when the operation is completed by handling the generated interrupt or polling the Status Register.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_dcfg.html" title="The XDcfg driver instance data. ">XDcfg</a> instance. </td></tr>
    <tr><td class="paramname">SourcePtr</td><td>contains a pointer to the source memory where the data is to be transferred from. </td></tr>
    <tr><td class="paramname">SrcWordLength</td><td>is the number of words (32 bit) to be transferred for the source transfer. </td></tr>
    <tr><td class="paramname">DestPtr</td><td>contains a pointer to the destination memory where the data is to be transferred to. </td></tr>
    <tr><td class="paramname">DestWordLength</td><td>is the number of words (32 bit) to be transferred for the Destination transfer. </td></tr>
    <tr><td class="paramname">TransferType</td><td>contains the type of PCAP transfer being requested. The definitions can be found in the <a class="el" href="xdevcfg_8h.html">xdevcfg.h</a> file. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS.if DMA transfer initiated successfully</li>
<li>XST_DEVICE_BUSY if DMA is busy</li>
<li>XST_INVALID_PARAM if invalid Source / Destination address is sent or an invalid Source / Destination length is sent</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>It is the responsibility of the caller to ensure that the cache is flushed and invalidated both before the DMA operation is started and after the DMA operation completes if the memory pointed to is cached. The caller must also ensure that the pointers contain physical address rather than a virtual address if address translation is being used.</dd></dl>
<p>The 2 LSBs of the SourcePtr (Source)/ DestPtr (Destination) address when equal to 2�b01 indicates the last DMA command of an overall transfer. </p>

<p>References <a class="el" href="struct_x_dcfg___config.html#a97b0e40ed1632649e15eedea77e84a82">XDcfg_Config::BaseAddr</a>, <a class="el" href="struct_x_dcfg.html#aa781f458f64d74c8147d10f09683301e">XDcfg::Config</a>, <a class="el" href="struct_x_dcfg.html#acd5816f6958bdbe2081d586d2b613f27">XDcfg::IsReady</a>, <a class="el" href="group__devcfg__v3__3.html#ga31ebfed655e59d8ee204b253e04ee024">XDCFG_CTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga16cb1e4072240a97799a685fad35234f">XDCFG_CTRL_PCAP_RATE_EN_MASK</a>, <a class="el" href="group__devcfg__v3__3.html#gafda6d24be18657370c15e1e893a0ab05">XDcfg_InitiateDma()</a>, <a class="el" href="group__devcfg__v3__3.html#gab3412c2881ffaa15fd3615770a4225a7">XDcfg_IsDmaBusy()</a>, <a class="el" href="group__devcfg__v3__3.html#ga80ad10863ac12916d347046e8263f5b2">XDCFG_MCTRL_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#gaa5d7d25bc3d66e24bce45553e863b731">XDCFG_MCTRL_PCAP_LPBK_MASK</a>, <a class="el" href="group__devcfg__v3__3.html#ga77561dc2e9ea13137f50a8193b8fbcd3">XDcfg_ReadReg</a>, <a class="el" href="group__devcfg__v3__3.html#gacc8c10b5cc877595c1ade09e1a589296">XDcfg_SetControlRegister()</a>, <a class="el" href="group__devcfg__v3__3.html#ga6646b7874a5c9cc7bcdba6072bb4ff72">XDCFG_STATUS_OFFSET</a>, <a class="el" href="group__devcfg__v3__3.html#ga2adb521e9dab8223c16f2ebbfccc830f">XDCFG_STATUS_PCFG_INIT_MASK</a>, and <a class="el" href="group__devcfg__v3__3.html#ga8ae617fbb2b3e148a8b2489e90fbdea3">XDcfg_WriteReg</a>.</p>

</div>
</div>
<h2 class="groupheader">Variable Documentation</h2>
<a class="anchor" id="ga77946de6f18b07bd6c24fdd084ab5395"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_dcfg___config.html">XDcfg_Config</a> XDcfg_ConfigTable[1]</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xdevcfg__g_8c.html">xdevcfg_g.c</a>&gt;</code></p>
<b>Initial value:</b><div class="fragment"><div class="line">= {</div>
<div class="line">        {</div>
<div class="line">                XPAR_XDCFG_0_DEVICE_ID,</div>
<div class="line">                XPAR_XDCFG_0_BASEADDR,</div>
<div class="line">        }</div>
<div class="line">}</div>
</div><!-- fragment -->
<p>This table contains configuration information for each Device Config Interface instance in the system. </p>

<p>Referenced by <a class="el" href="group__devcfg__v3__3.html#gab7512afadad93e25630048943fd72d41">XDcfg_LookupConfig()</a>.</p>

</div>
</div>
</div><!-- contents -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
  <ul>
    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
  </ul>
</div>
</body>
</html>
